
- 制造厂商:TI(德州仪器,Texas Instruments)
- 产品类别:逻辑和电压转换
- 技术类目:专用逻辑 IC - 数字多路复用器和编码器
- 功能描述:10 线至 4 线 BCD 优先级编码器
- 点击这里打开及下载CD40147B的技术文档资料
- TI代理渠道,提供当日发货、严格的质量标准,满足您的目标价格

The CD40147B CMOS encoder features priority encoding of the inputs to ensure that only the highest-order data line is encoded. Ten data input lines (0-9) are encoded to four-line (8, 4, 2, 1) BCD. The highest priority line is line 9. All four output lines are logic 1 (VSS) when all input lines are logic 0. All inputs and outputs are buffered, and each output can drive one TTL low-power Schottky load. The CD40147B is functionally similar to the TTL54/74147 if pin 15 is tied low.
The CD40147B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
- Encodes 10-line to 4-line BCD
- Active low inputs and outputs
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
- Maximum input current of 1 A at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package temperature range) = 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
- Applications:
- Keyboard encoding
- 10-line to BCD encoding
- Range selection
- Technology Family
- CD4000
- Function
- Encoder
- Configuration
- 10:4
- Number of channels (#)
- 1
- Operating temperature range (C)
- -55 to 125
- Rating
- Catalog
CD40147B的完整型号有:CD40147BE、CD40147BM,以下是这些产品的关键参数及官网采购报价:
CD40147BE,工作温度:-55 to 125,封装:PDIP (N)-16,包装数量MPQ:25个,MSL 等级/回流焊峰值温度:N/A for Pkg Type,引脚镀层/焊球材料:NIPDAU,TI官网CD40147BE的批量USD价格:.513(1000+)
CD40147BM,工作温度:-55 to 125,封装:SOIC (D)-16,包装数量MPQ:40个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网CD40147BM的批量USD价格:.446(1000+)

14-24-LOGIC-EVM 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。



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