These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the ’ACT374 devices are D-type edge-triggered flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines in bus-organized systems without need for interface or pullup components.

OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

• 4.5-V to 5.5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Max tpd of 10 ns at 5 V
• Inputs Are TTL-Voltage Compatible

• Number of channels (#)
• 8
• Technology Family
• ACT
• Supply voltage (Min) (V)
• 4.5
• Supply voltage (Max) (V)
• 5.5
• Input type
• TTL-Compatible CMOS
• Output type
• 3-State
• Clock Frequency (Max) (MHz)
• 90
• IOL (Max) (mA)
• 24
• IOH (Max) (mA)
• -24
• ICC (Max) (uA)
• 40
• Features
• Balanced outputs, Very high speed (tpd 5-10ns), Positive input clamp diode

SN54ACT374-SP的完整型号有：5962-8763101VSA，以下是这些产品的关键参数及官网采购报价：

5962-8763101VSA，工作温度：-55 to 125，封装：CFP (W)-20，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网5962-8763101VSA的批量USD价格：107.866（1000+）