SN54LS373-SP_TI 具有三态输出的八路 D 类透明锁存器

SN54LS373-SP的基本参数

制造厂商：TI
产品类别：逻辑和电压转换
技术类目：触发器、锁存器和寄存器 - D 型锁存器
功能描述：具有三态输出的八路 D 类透明锁存器
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SN54LS373-SP的产品详情：

These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pullup components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the ’LS373 and ’S373 are transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q outputs follow the data (D) inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up.

The eight flip-flops of the ’LS374 and ’S374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic states that were set up at the D inputs.

Schmitt-trigger buffered inputs at the enable/clock lines of the ’S373 and ’S374 devices simplify system design as ac and dc noise rejection is improved by typically 400 mV due to the input hysteresis. A buffered output-control (OC) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

OC\ does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or new data can be entered, even while the outputs are off.

SN54LS373-SP的优势和特性：

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package
3-State Bus-Driving Outputs
Full Parallel Access for Loading
Buffered Control Inputs
Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374)
P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and ’S374)

SN54LS373-SP的参数（英文）：

Number of channels (#)
8
Technology Family
LS
Supply voltage (Min) (V)
4.75
Supply voltage (Max) (V)
5.25
Input type
Bipolar
Output type
3-State
Clock Frequency (Max) (MHz)
35
IOL (Max) (mA)
24
IOH (Max) (mA)
-2.6
ICC (Max) (uA)
40000
Features
High speed (tpd 10-50ns)

SN54LS373-SP具体的完整产品型号参数及价格（美元）：

SN54LS373-SP的完整型号有：JM38510/32502SRA、JM38510/32502SSA、M38510/32502SRA、M38510/32502SSA，以下是这些产品的关键参数及官网采购报价：

JM38510/32502SRA，工作温度：-55 to 125，封装：CDIP (J)-20，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网JM38510/32502SRA的批量USD价格：112.288（1000+）

JM38510/32502SSA，工作温度：-55 to 125，封装：CFP (W)-20，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网JM38510/32502SSA的批量USD价格：134.746（1000+）

M38510/32502SRA，工作温度：-55 to 125，封装：CDIP (J)-20，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网M38510/32502SRA的批量USD价格：112.288（1000+）

M38510/32502SSA，工作温度：-55 to 125，封装：CFP (W)-20，包装数量MPQ：1个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：SNPB，TI官网M38510/32502SSA的批量USD价格：134.746（1000+）

SN54LS373-SP的评估套件：

SN54LS373-SP的电路图解：

SN54LS373-SP的评估套件：