The 'ABT16825 devices are 18-bit buffers and line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices can be used as two 9-bit buffers or one 18-bit buffer. They provide true data.

The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1\ or OE2\) input is high, all nine affected outputs are in the high-impedance state.

When V_CC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

• Members of Texas Instruments' WidebusTM Family
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD 17
• Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C
• High-Impedance State During Power Up and Power Down
• Distributed VCC and GND Pins Minimize High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB Layout
• High-Drive Outputs (-32-mA IOH, 64-mA IOL)

Widebus is a trademark of Texas Instruments.

• Technology Family
• ABT
• Supply voltage (Min) (V)
• 4.5
• Supply voltage (Max) (V)
• 5.5
• Number of channels (#)
• 18
• IOL (Max) (mA)
• 64
• ICC (Max) (uA)
• 32000
• IOH (Max) (mA)
• -32
• Input type
• TTL-Compatible CMOS
• Output type
• 3-State
• Features
• Ultra high speed (tpd <5ns), Partial power down (Ioff), Over-voltage tolerant inputs, Power up 3-state
• Rating
• Catalog

SN74ABT16825的完整型号有：SN74ABT16825DL、SN74ABT16825DLR，以下是这些产品的关键参数及官网采购报价：

SN74ABT16825DL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ABT16825DL的批量USD价格：1.435（1000+）

SN74ABT16825DLR，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：1000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ABT16825DLR的批量USD价格：1.196（1000+）