This 18-bit universal bus driver is designed for 1.65-V to 3.6-V V_CC operation.

Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

• Member of the Texas Instruments Widebus Family
• Operates From 1.65 V to 3.6 V
• Max tpd of 3.6 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

• IOL (Max) (mA)
• 24
• IOH (Max) (mA)
• -64
• Technology Family
• ALVC
• Rating
• Catalog
• Operating temperature range (C)
• -40 to 85

SN74ALVCH16835的完整型号有：SN74ALVCH16835DGGR、SN74ALVCH16835DGVR，以下是这些产品的关键参数及官网采购报价：

SN74ALVCH16835DGGR，工作温度：-40 to 85，封装：TSSOP (DGG)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16835DGGR的批量USD价格：.854（1000+）

SN74ALVCH16835DGVR，工作温度：-40 to 85，封装：TVSOP (DGV)-56，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ALVCH16835DGVR的批量USD价格：.854（1000+）