This 9-bit to 18-bit D-type latch is designed for 3.15-V to 3.45-V V_CC operation. The D inputs accept HSTL levels and the Q outputs provide LVTTL levels.

The SN74HSTL16918 is particularly suitable for driving an address bus to two banks of memory. Each bank of nine outputs is controlled with its own latch-enable (LE\) input.

Each of the nine D inputs is tied to the inputs of two D-type latches that provide true data (Q) at the outputs. While LE\ is low, the Q outputs of the corresponding nine latches follow the D inputs. When LE\ is taken high, the Q outputs are latched at the levels set up at the D inputs.

The SN74HSTL16918 is characterized for operation from 0°C to 70°C.

Output level before the indicated steady-state input conditions were established

• Member of the Texas Instruments WidebusTM Family
• Inputs Meet JEDEC HSTL Std JESD 8-6 and Outputs Meet Level III Specifications
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Packaged in Plastic Thin Shrink Small-Outline Package

Widebus is a trademark of Texas Instruments Incorporated.

• Number of channels (#)
• 9
• Technology Family
• HSTL
• Supply voltage (Min) (V)
• 3.15
• Supply voltage (Max) (V)
• 3.45
• Input type
• TTL-Compatible CMOS
• Output type
• CMOS
• Clock Frequency (Max) (MHz)
• 75
• IOL (Max) (mA)
• 24
• IOH (Max) (mA)
• -24
• ICC (Max) (uA)
• 100000
• Features
• Standard speed (tpd > 50ns)

SN74HSTL16918的完整型号有：SN74HSTL16918DGGR，以下是这些产品的关键参数及官网采购报价：

SN74HSTL16918DGGR，工作温度：-40 to 85，封装：TSSOP (DGG)-48，包装数量MPQ：2000个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74HSTL16918DGGR的批量USD价格：2.175（1000+）