These devices each contain an 8-bit D-type sorage register. The storage register has buffered ('LS594) or open-collector ('LS599) outputs. Separate clocks and direct-overriding clears are provided on both the shift and storage registers. A shift output (Q_H') is provided for cascading purposes.

Both the shift register and the storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register will always be one clock pulse ahead of the storage register.

• 8-Bit Serial-In, Parallel-Out Shift Registers with Storage
• Choice of Output Configurations: 'LS594 . . . Buffered 'LS599 . . . Open-Collector
• Guaranteed Shift Frequeny: DC to 20 MHz
• Independent Direct-Overriding Clears on Shift and Storage Registers

• Configuration
• Serial-in, Parallel-out
• Bits (#)
• 8
• Technology Family
• LS
• Supply voltage (Min) (V)
• 4.75
• Supply voltage (Max) (V)
• 5.25
• Input type
• Bipolar
• Output type
• Push-Pull
• Clock Frequency (MHz)
• 25
• IOL (Max) (mA)
• 24
• IOH (Max) (mA)
• -2.6
• ICC (Max) (uA)
• 65000
• Features
• High speed (tpd 10-50ns)

SN74LS594的完整型号有：SN74LS594N，以下是这些产品的关键参数及官网采购报价：

SN74LS594N，工作温度：0 to 70，封装：PDIP (N)-16，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网SN74LS594N的批量USD价格：11.326（1000+）

14-24-LOGIC-EVM 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。