The CD74HCT356 consists of data selectors/multiplexers that select one of eight sources. The data select bits (S0, S1, and S2) are stored in transparent latches that are enabled by a low latch enable input (LE\).

The data is stored in edge-triggered flip-flops that are triggered by a low-to-high clock transition.

In both types the 3-state outputs are controlled by three output-enable inputs (OE1\, OE2\, and OE3).

• Edge-Triggered Data Flip-Flops
  • Transparent Select Latches
• Buffered Inputs
• 3-State Complementary Outputs
• Bus Line Driving Capability
• Typical Propagation Delay: VCC= 5V, CL = 15pF, TA = 25°C
  • Clock to Output = 22ns
• Fanout (Over Temperature Range)
  • Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
  • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• 4.5V to 5.5V Operation
• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, Il 1A at VOL, VOH

• Technology Family
• HCT
• Function
• Digital Multiplexer
• Configuration
• 8:1
• Number of channels (#)
• 1
• Operating temperature range (C)
• -55 to 125
• Rating
• Catalog

CD74HCT356的完整型号有：CD74HCT356E，以下是这些产品的关键参数及官网采购报价：

CD74HCT356E，工作温度：-55 to 125，封装：PDIP (N)-20，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网CD74HCT356E的批量USD价格：0.604（1000+）

14-24-LOGIC-EVM 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。