These 18-bit bus-interface flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The ’ABT162823A devices can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (CLKEN)\ input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, thus latching the outputs. Taking the clear (CLR)\ input low causes the Q outputs to go low independently of the clock.

A buffered output-enable (OE)\ input places the nine outputs in either a normal logic state (high or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

To ensure the high-impedance state during power up or power down, OE\ shall be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

• Members of the Texas Instruments Widebus Family
• Output Ports Have Equivalent 25- Series Resistors So No External Resistors Are Required
• Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C
• High-Impedance State During Power Up and Power Down
• Ioff and Power-Up 3-State Support Hot Insertion
• Distributed VCC and GND Pins Minimize High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB Layout

Widebus is a trademark of Texas Instruments.

• Number of channels (#)
• 18
• Technology Family
• ABT
• Supply voltage (Min) (V)
• 4.5
• Supply voltage (Max) (V)
• 5.5
• Input type
• TTL-Compatible CMOS
• Output type
• 3-State
• Clock Frequency (Max) (MHz)
• 150
• IOL (Max) (mA)
• 12
• IOH (Max) (mA)
• -12
• ICC (Max) (uA)
• 80000
• Features
• Balanced outputs, Very high speed (tpd 5-10ns), Partial power down (Ioff), Power up 3-state, Damping resistors

SN74ABT162823A的完整型号有：SN74ABT162823ADL，以下是这些产品的关键参数及官网采购报价：

SN74ABT162823ADL，工作温度：-40 to 85，封装：SSOP (DL)-56，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74ABT162823ADL的批量USD价格：1.413（1000+）