These octal bus transceivers are designed for asynchronous two-way communication between

data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable input disables the device so that the buses are effectively isolated.

The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum I_OL is increased to 48 mA in the -1 versions.

The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.

• Bidirectional Bus Transceivers in High-Density 20-Pin Packages
• Choice of True or Inverting Logic
• Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs

• IOL (Max) (mA)
• 64
• IOH (Max) (mA)
• 0.1
• Technology Family
• AS
• Rating
• Catalog
• Operating temperature range (C)
• 0 to 70

SN74AS641的完整型号有：SN74AS641DW、SN74AS641N，以下是这些产品的关键参数及官网采购报价：

SN74AS641DW，工作温度：0 to 70，封装：SOIC (DW)-20，包装数量MPQ：25个，MSL 等级/回流焊峰值温度：Level-1-260C-UNLIM，引脚镀层/焊球材料：NIPDAU，TI官网SN74AS641DW的批量USD价格：3.587（1000+）

SN74AS641N，工作温度：0 to 70，封装：PDIP (N)-20，包装数量MPQ：20个，MSL 等级/回流焊峰值温度：N/A for Pkg Type，引脚镀层/焊球材料：NIPDAU，TI官网SN74AS641N的批量USD价格：4.125（1000+）

14-24-LOGIC-EVM 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。