
- 制造厂商:TI(德州仪器,Texas Instruments)
- 产品类别:逻辑和电压转换
- 技术类目:缓冲器、驱动器和收发器 - 反向缓冲器和驱动器
- 功能描述:具有漏极开路输出的汽车类 6 通道、1.65V 至 3.6V 反相器
- 点击这里打开及下载SN74LVC06A-Q1的技术文档资料
- TI代理渠道,提供当日发货、严格的质量标准,满足您的目标价格

This hex inverter buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The outputs of the SN74LVC06A device are open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- Qualified for Automotive Applications
- Operate From 1.65 V to 3.6 V
- Inputs and Open-Drain Outputs Accept Voltages up to 5.5 V
- Max tpd of 3.7 ns at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Technology Family
- LVC
- Supply voltage (Min) (V)
- 1.65
- Supply voltage (Max) (V)
- 3.6
- Number of channels (#)
- 6
- IOL (Max) (mA)
- 24
- IOH (Max) (mA)
- 0
- ICC (Max) (uA)
- 40
- Input type
- Standard CMOS
- Output type
- Open-Drain
- Features
- Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs
- Rating
- Automotive
SN74LVC06A-Q1的完整型号有:SN74LVC06AQDRG4Q1、SN74LVC06AQDRQ1、SN74LVC06AQPWRG4Q1,以下是这些产品的关键参数及官网采购报价:
SN74LVC06AQDRG4Q1,工作温度:-40 to 125,封装:SOIC (D)-14,包装数量MPQ:2500个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LVC06AQDRG4Q1的批量USD价格:.14(1000+)
SN74LVC06AQDRQ1,工作温度:-40 to 125,封装:SOIC (D)-14,包装数量MPQ:2500个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LVC06AQDRQ1的批量USD价格:.124(1000+)
SN74LVC06AQPWRG4Q1,工作温度:-40 to 125,封装:TSSOP (PW)-14,包装数量MPQ:2000个,MSL 等级/回流焊峰值温度:Level-1-260C-UNLIM,引脚镀层/焊球材料:NIPDAU,TI官网SN74LVC06AQPWRG4Q1的批量USD价格:.14(1000+)

14-24-LOGIC-EVM 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM
该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。



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